4.00 System-level Model for a Gals Massively Parallel Average Interconnections Delay Prediction for On-fpga On-chip Measurement of Mtbf for a Robust Synchronizer 13.00 Power Management with Accumulation and Fire Mechanism Resolving Deadlock Failures in 2-phase Interconnect

نویسندگان

  • Yebin Shi
  • Mukaram Khan
  • Xin Jin
  • Steve B. Furber
  • Luis A. Plana
  • Nikolaos Minas
  • Matthew Marshall
  • Gordon Russell
  • Yuan Chen
  • Fei Xia
  • Delong Shang
  • Alex Yakovlev
  • Steve Furber
چکیده

Asynchronous rather than synchronous interconnect has been a promising alternative for a large scale system to remove significant problems caused by global clock trees. Considering the vulnerability of asynchronous circuit to hazards, in this paper we investigate the occurrence of deadlocks on asynchronous 2-phase interconnect. Finally we explore the space of fault tolerance in the 2-phase interconnect interface. Particularly, improved circuit for transmitters and receivers free of deadlock

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تاریخ انتشار 2007